1. Field of the Invention
The invention relates to a circuit device and a method of manufacturing the same, and more particularly relates to a circuit device incorporating a power semiconductor element that performs switching of a large current and to a method of manufacturing the same.
2. Description of the Related Art
A structure of a conventional hybrid integrated circuit device 100 is described with reference to FIG. 9. This technology is described for instance in Japanese Patent Application Publication No. Hei 5-102645. A conductive pattern 103 is formed on a surface of a rectangular substrate 101 with an insulative layer 102 interposed therebetween. A certain electrical circuit is formed by fixedly attaching circuit elements on the conductive pattern 103. Here, a semiconductor element 105A and a chip element 105B as the circuit elements are connected to the conductive pattern 103. Leads 104 are connected to pads 109 each formed of a part of the conductive pattern 103 at a peripheral portion of the substrate 101 and function as external terminals. An encapsulating resin 108 has a function of encapsulating the electrical circuit formed on the surface of the substrate 101.
The semiconductor element 105A is a power element through which a large current of about several to several hundreds of amperes flows for example and thus generates an extremely large amount of heat. Thus, the semiconductor element 105A has been placed on an upper portion of a heat sink 110 placed on the conductive pattern 103. The heat sink 110 is made of a piece of metal such as copper having a size of about length×width×thickness=10 mm×10 mm×1 mm for example.
However, in the hybrid integrated circuit device 100 having the structure, to form a circuit such as an inverter circuit for converting a large current on the upper surface of the substrate 101, the conductive pattern 103 needs to be wide to secure a current capacity. Thus, downsizing of the hybrid integrated circuit device 100 is hindered. Moreover, a heat sink needs to be prepared for each semiconductor element to secure heat dissipation, whereby the cost is increased.